- Lecture 1 (Introduction: Architecture Performance) (slides in ppt)
- Lecture 2 (MIPS Instruction Set and Pipelining) (slides in ppt)
- Lecture 3 (Pipeline Hazards) (slides in ppt)
- Lecture 4 (Hazards and Compiler Techniques) (slides in ppt)
- Lecture 5 (Branch Prediction and Scoreboarding) (slides in ppt)
- Lecture 6 (Score Boarding and Tomasulo) (slides in ppt)
- Lecture 7 (Tomasulo Algorithm) (slides in ppt)
- Lecture 8 (Hardware Speculation) (slides in ppt)
- Lecture 9 (Limits on ILP and Multithreading) ( slides in ppt)
- Lecture 10 (Multithreaded and Multicore) (slides in ppt)
- Lecture 11 (Multicore and Network Processors) (slides in ppt)
- Lecture 12 (Cache Architectures) (slides in ppt)
- Lecture 13 (Cache Architectures Contd) (slides in ppt)
- Lecture 14 (Cache and Memory Architectures) (slides in pptx)
- Lecture 13 (Slides in ppt)
- Lecture 14 (Slides in ppt)
- Lecture 15 (Slides in ppt)
- Lecture 16 (Slides in ppt)
- Lecture 17 (Slides in ppt)
- Lecture 18 (Slides in ppt)
Monday, 19 October 2015
Computer Architecture
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