| 1 - Introduction To Digital Circuits
(49:38) |
| 2 - Introduction To Digital Circuits (54:27) |
| 3 - Combinational Logic Basics (49:10) |
| 4 - Combinational Circuits (53:23) |
| 5 - Logic Simplification (54:17) |
| 6 - Karnaugh Maps And Implicants (52:42) |
| 7 - Logic Minimization Using Karnaugh Maps (52:19) |
| 8 - Karnaugh Map Minimization Using Maxterms (52:46) |
| 9 - Code Converters (54:28) |
| 10 - Parity Generators And Display Decoder (51:26) |
| 11 - Arithmetic Circuits (52:57) |
| 12 - Carry Look Ahead Adders (52:40) |
| 13 - Subtractors (51:00) |
| 14 - 2'S Complement Subtractor and BCD Adder (51:47) |
| 15 - Array Multiplier (52:56) |
| 16 - Introduction to Sequential Circuits (50:24) |
| 17 - S-R, J-K and D Flip Flops (52:52) |
| 18 - J-K and T Flip Flops (52:43) |
| 19 - Triggering Mechanisms of Flip Flops and Counters (52:28) |
| 20 - Up/ Down Counters (51:33) |
| 21 - Shift Registers (54:35) |
| 22 - Application of shift Registers (52:53) |
| 23 - State Machines (50:15) |
| 24 - Design of Synchronous Sequential Circuits (53:55) |
| 25 - Design using J-K Flip Flop (50:55) |
| 26 - Mealy and Moore Circuits (51:05) |
| 27 - Pattern Detector (52:44) |
| 28 - MSI and LSI Based Design (47:41) |
| 29 - Multiplexer Based Design (49:54) |
| 30 - Encoders and Decoders (49:45) |
| 31 - Programmable Logic Devices (52:08) |
| 32 - Design using Programmable Logic Devices (51:45) |
| 33 - Design using Programmable Logic Devices (contd) (52:58) |
| 34 - MSI and LSI based Implementation of Sequential Circuits
(50:06) |
| 35 - MSI and LSI based Implementation of Sequential Circuits
(contd) (49:40) |
| 36 - Design of circuits using MSI sequential blocks (51:25) |
| 37 - System Design Example (50:57) |
| 38 - System Design Example (contd) (53:22) |
| 39 - System Design using the concept of controllers (49:45) |
| 40 - System Design using the concept of controllers (contd)
(50:39) |